1. Field of the Invention
The present invention is generally related to power amplifiers, and, more specifically, to a power amplifier designed to be used at two or more output powers.
2. Discussion of the Background
In transmitters used in GSM like systems, the output power of the transmitter is controlled by a power amplifier (xe2x80x9cPAxe2x80x9d). The efficiency at which a PA operates is dependent upon the amount of power being produced and the load seen by the PA. That is, for a given load being driven by the PA, there is an output power at which the efficiency of the PA is maximized. This output power is referred to as the xe2x80x9coptimum output powerxe2x80x9d. Thus, for a given load, a PA operates less efficiently when the output power is lowered from the optimum output power, unless the load of the PA is appropriately adjusted.
If the output power range is desired to be very wide (for example, 0-33 dBm), this method becomes complicated. One solution is to use a DC/DC converter. But this solution is costly and takes up a great deal of space.
What is desired, therefore, is a system and/or method that overcomes these and other disadvantages associated with power amplifiers.
Embodiments of the present invention provide a power amplifier that operates at a high efficiency over a wide power range. According to one embodiment, the power amplifier includes two circuits connected in parallel. The first circuit and the second circuit each include a transistor. Each transistor is connected to a supply voltage through a controllable connector, such as a switch a linear regulator. Each transistor is also connected through an inductor to a shunt capacitor to ground. In full output power mode all transistors are connected to the supply voltage through a controllable connector and all transistors are biased normally. In less than full output power mode, one of the transistors is disconnected from the supply voltage by xe2x80x9cturning offxe2x80x9d the connector that connects the transistor to the supply voltage. While disconnected from the supply voltage, the transistor""s bias voltage is increased, thereby forming a low resistance to ground. This means that the inductor connected to the transistor is now connected to ground and in parallel with the shunt capacitor. What then happens is that the negative admittance of the circuit formed by the shunt capacitor and inductor is lowered and that the Inductance (L) increases since one of the inductors is no longer in parallel with the other inductors. The increase in the Inductance causes the impedance at the collector to increase. The increase in the impedance at the collector results in realization of a high efficiency at the lower output power.
Depending on how many of the transistors are short circuited to ground, a different impedance can be presented for the power amplifier. It is possible to choose a matching network which makes it possible to maintain the correct phase of the load at least for the lower impedance.
Further features and advantages of the present invention, as well as the structure and operation of various embodiments of the present invention, are described in detail below with reference to the accompanying drawings.
It should be emphasized that the term xe2x80x9ccomprises/comprisingxe2x80x9d when used in this specification is taken to specify the presence of stated features, integers, steps, or components but does not preclude the presence or addition of one or more other features, integers, steps, components or groups thereof.